Currently working as RTL Design Engineer at 3rditech and previously R&D Engineer at Keysight Technologies and as Project Engineer at Synapse Design Inc months and advanced training in RTL Design and Verification areas from Entuple Technologies Pvt Ltd.
Proficient in C, C+, Verilog, Digital Logic, System Verilog, Lint, CDC, RTL Design, Verification, Simulation and Debugging.